Memory control circuit

Abstract

PURPOSE: To unnecessitate an updown counter, to miniatualize the circuit and reduce the manufacture cost by comparing the output of a writing pointer to the output of a reading pointer and managing the number of data in the memory with the compared result. CONSTITUTION: The writing pointer 2 and the reading pointer 3 are respectively operated as a counter with (n+1) bits conducted one increment at every writing/ reading of data to the memory or from the memory and low-oder n bits of the output are used as a writing/reading address to the memory and the most significant bit is used as a writing/reading control bit. A pointer comparison part 4 compares the outputs of pointers 2, 3 and when both addresses of writing and reading are equal and both control bits are unequal, a memory write inhibit signal FF is outputted and when both addresses and both control bits are respectively equal, a write inhibit signal EF from the memory is outputted. COPYRIGHT: (C)1992,JPO&Japio

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    JP-H07327038-ADecember 12, 1995Nec Corp, 日本電気株式会社データ受信装置およびバッファ管理方法